Silicon single crystal wafer and method for producing silicon single crystal

ABSTRACT

There can be provided a silicon single crystal wafer grown according to Czochralski method wherein the whole plane of the wafer is occupied by N region on the outside of OSF generated in a shape of a ring by thermal oxidation treatment and there exists no defect region detected by Cu deposition. Thereby, there can be produced a silicon single crystal wafer according to CZ method, which does not belong to any of V region rich in vacancies, OSF region and I region rich in interstitial silicons, and can surely improve electric characteristics such as oxide dielectric breakdown voltage characteristics or the like under stable manufacture conditions.

TECHNICAL FIELD

The present invention relates to a silicon single crystal wafer withhigh breakdown voltage and excellent electrical characteristics, inwhich any of defect regions such as V region, OSF region and I region asdescribed below are not present, and in which oxide-film defectsdetected by copper deposition treatment are not formed, and a method forproducing the silicon single crystal.

BACKGROUND TECHNOLOGY

In recent years, a demand for quality of a silicon single crystalproduced by Czochralski method (hereafter abbreviated to CZ method) usedas a substrate has been increasing due to decrease in size of a deviceresulting from increased degree of integration of a semiconductorcircuit. There exist defects introduced during growth of a singlecrystal called grown-in defects such as FPD, LSTD and COP, which degradeoxide dielectric breakdown voltage characteristics and devicecharacteristics. It has been considered that it is important to decreasea density and a size thereof.

For explanation of the above-mentioned defects, first are describedgeneral matters known as for factors which determine a concentration ofpoint defects called vacancy (hereinafter occasionally referred to as V)and a concentration of point defects called interstitial silicon(Interstitial-Si, hereinafter occasionally referred to as I).

In a silicon single crystal, V region refers to a region which containsa large amount of vacancies, i.e., depressions, pits, or the like causedby lack of silicon atoms; and an I region refers to a region whichcontains a large amount of dislocations caused by existence of excesssilicon atoms or a large amount of clusters of excess silicon atoms.Further, between the V region and the I region, there exists a neutral(hereinafter occasionally referred to as N) region which contains no (orlittle) surplus or no (or little) shortage of silicon atoms. Recentstudies have revealed that the above-mentioned grown-in defects (such asFPDs, LSTDs and COPs) are generated only when V or I are present in asupersaturated state and that even when some atoms are unevenlydistributed, they do not appear as a defect so long as V and I do notexceed the saturation level.

It has been confirmed that a concentration of each of these pointdefects depends on the relation between a pulling rate (growth rate) ofthe crystal in CZ method and a temperature gradient G near asolid-liquid interface of the crystal, and that another type of defectcalled oxidation-induced stacking fault (hereinafter occasionallyreferred to as OSF) is present in a ring-shape distribution near aboundary between V region and I region, when the cross sectionperpendicular to the axis of crystal growth is observed.

When a crystal is pulled through use of a CZ pulling apparatus with afurnace structure having a large temperature gradient G near asolid-liquid interface of the crystal (hereinafter occasionally referredto as hot zone: HZ) with growth rates varying from high speed to a lowspeed along the crystal axis, these defects introduced during thecrystal growth exist as in a distribution chart of defects shown in FIG.7.

These defects introduced during the crystal growth can be classified asfollows. When the growth rate is relatively high, for example, about 0.6mm/min or higher, grown-in defects such as FPDs, LSTDs and COPs whichare considered to be generated due to voids consisting of aggregatedvacancy-type point defects are present at a high density over the entireradial cross section of the crystal. The region where these defects arepresent is called V region (See FIG. 7, line (A)). When a growth rate isnot higher than 0.6 mm/min, the OSF ring is generated with decrease ofthe growth rate, from a circumferential portion of the crystal. If thegrowth rate is decreased further, a diameter of the ring shrinks, anddefects of L/D (large dislocation, abbreviation of interstitialdislocation loop, LSEPD, LFPD or the like) which are considered to begenerated due to dislocation loop are present at a low density outsidethe ring. The region where these defects are present is called I region(hereinafter occasionally referred to as L/D region). Furthermore, whenthe growth rate is decreased to about 0.4 mm/min or less, the OSF ringshrinks to the center of a wafer and disappears, so that the I regionspreads over the entire plane of the wafer (See FIG. 7, line (C)).

Furthermore, there has been recently found existence of a region, calledN region, where there is located between the V region and the I regionand outside the OSF ring, and where there exists neither defects due tovacancies such as FPDs, LSTDs and COPs nor defects due to a dislocationloop such as LSEPDs and LFPDs. It has been reported that located outsidethe OSF ring is the region where substantially no oxygen precipitationoccurs when a single crystal is subjected to a heat treatment for oxygenprecipitation and the contrast due to precipitates is observed throughuse of an X-ray beam or the like, and that the region is on an I regionside and is not rich enough to cause formation of LSEPDs and LFPDs (SeeFIG. 7, line (B)).

Since these N regions exist inclining from growth axis when a growthrate is lowered in the case of general methods, they exist only in apart of a plane of the wafer.

According to the Voronkov theory (V. V. Voronkov; Journal of CrystalGrowth, 59 (1982) 625-643), it is proposed as for N region that a totalconcentration of a point defect is defined by a parameter called V/Gwhich is the ratio of a pulling rate (V) and a temperature gradient (G)along the axis direction in the crystal solid-liquid interface.Considering the above theory, only a crystal wherein V region exists ata center and I region exist around it over N region can be obtained at acertain pulling rate, since a pulling rate is constant in a plane and Gis distributed in the plane.

Recently, it is proposed that the N-region which could exist onlyslantwise is enlarged by improving distribution of G within a plane. Forexample, when a crystal is pulled with decreasing a pulling rate Vgradually, the crystal in which the N region spread horizontally overthe whole plane can be obtained at a certain pulling rate. Enlargementof the crystal having N region spreading horizontally over the wholeplane into a direction of length can be achieved to some extent bymaintaining the pulling rate at which the N region spreads horizontally.By controlling a pulling rate so that V/G value may be constant withconsidering that G is varied with growth of the crystal and calibratingit, the crystal having the N region over the whole plane can be enlargedinto a direction of growth to some extent.

The N region can be classified into Nv region (the region where a lot ofvacancies exist) adjacent to the outside of OSF ring and Ni region (theregion where a lot of interstitial silicons exist) adjacent to I region.It has been found that a lot of oxide precipitates are generated in theNv region when thermal oxidation treatment is carried out, and thatthere is almost no oxide precipitates are generated in the Ni region.

However, it has been found that an oxide-film defects may occurremarkably, even if it is a crystal such as the above-mentioned singlewherein the N region occupies the whole plane, an OSF ring is notgenerated when thermal oxidation treatment is carried out, and FPD andL/D do not exist in the whole plane. This may be a cause of degradingelectrical characteristics such as oxide dielectric breakdown voltagecharacteristics. Accordingly, the fact that the N region occupies wholeplane as in a conventional crystal is not enough, and the furtherimprovement has been desired.

DISCLOSURE OF THE INVENTION

The present invention has been made in order to solve such problems. Theobject of the present invention is to provide a silicon single crystalwafer according to CZ method, which does not belong to any of V regionrich in vacancies, OSF region and I region rich in interstitialsilicons, and can surely improve electric characteristics such as oxidedielectric breakdown voltage characteristics or the like under stablemanufacture conditions.

To achieve the above mentioned object, the present invention provides asilicon single crystal wafer grown according to Czochralski methodwherein the whole plane of the wafer is occupied by N region on theoutside of OSF generated in a shape of a ring by thermal oxidationtreatment and there exists no defect region detected by Cu deposition.

As described above, since the silicon single crystal wafer according tothe present invention is a defect-free wafer wherein the whole plane ofthe wafer is occupied by N region on the outside of OSF generated in ashape of a ring by thermal oxidation treatment and there exists nodefect region detected by Cu deposition, it is a silicon wafer havinghigh quality which does not degrade electric characteristics such asoxide dielectric breakdown voltage characteristics or the like when adevice is fabricated thereon.

The second embodiment of the present invention also provides a siliconsingle crystal wafer grown according to Czochralski method wherein thewhole plane of the wafer is occupied by N region on the outside of OSFgenerated in a shape of a ring by thermal oxidation treatment and thereexist in the whole plane of the wafer neither a defect region detectedby Cu deposition nor Ni region where oxygen precipitation is hardlycaused.

As described above, since the silicon single crystal wafer according tothe present invention is a defect-free wafer wherein the whole plane ofthe wafer is occupied by N region on the outside of OSF generated in ashape of a ring by thermal oxidation treatment and there exist in thewhole plane of the wafer neither a defect region detected by Cudeposition nor Ni region where oxygen precipitation is hardly caused, itdoes not degrade electric characteristics such as oxide dielectricbreakdown voltage characteristics or the like when a device isfabricated thereon, and has a high gettering performance.

Next, a method for producing a silicon single crystal according to thepresent invention is a method for producing a silicon single crystalaccording to Czochralski method wherein the crystal is grown in adefect-free region which is N region on the outside of OSF generated ina shape of a ring when the grown silicon single crystal wafer issubjected to thermal oxidation treatment in which a defect regiondetected by Cu deposition does not exist.

The present invention also provides a method for producing a siliconsingle crystal by Czochralski method wherein the crystal is grown withcontrolling a growth rate between the growth rate of the boundary wherethe defect region detected by Cu deposition remaining afterdisappearance of OSF ring is disappeared when gradually decreasing agrowth rate of silicon single crystal during pulling and the growth rateof the boundary where interstitial dislocation loop is generated when agrowth rate is gradually lowered further.

According to these methods, there can be produced a defect-free siliconsingle crystal wafer occupied by N region on the outside of OSFgenerated in a shape of a ring by thermal oxidation treatment in whichno defect region detected by Cu deposition exists which degradeselectric characteristics such as oxide dielectric breakdown voltagecharacteristics or the like.

The second embodiment of the method for producing a silicon singlecrystal according to the present invention is a method of growing asilicon single crystal by Czochralski method wherein the crystal isgrown in the region which is N region on the outside of OSF generated ina shape of a ring by thermal oxidation treatment in which neither defectregion detected by Cu deposition nor Ni region where oxygenprecipitation is hardly caused exists.

In addition, the present invention also relates to a method forproducing a silicon single crystal according to the present invention isa method of growing a single crystal by Czochralski method wherein thecrystal is grown with controlling a growth rate between the growth rateof the boundary where the defect region detected by Cu depositionremaining after disappearance of OSF ring is disappeared when graduallydecreasing a growth rate of silicon single crystal during pulling andthe growth rate of the boundary where the Ni region in which oxygenprecipitation is hardly caused is generated when a growth rate isgradually lowered further.

According to these method for producing, the defect-free silicon singlecrystal wafer can be produced wherein the whole plane of the wafer isoccupied by N region on the outside of OSF generated in a shape of aring by thermal oxidation treatment and there exists neither a defectregion detected by Cu deposition nor Ni region where oxygenprecipitation is hardly caused. Accordingly, the crystal excellent inoxide dielectric breakdown voltage and gettering capacity can beobtained.

In these methods for producing, a pulling rate at the time of a crystalgrowth is preferably 0.5 mm/min or more.

As described above, if a pulling rate at the time of a crystal growth is0.5 mm/min or more, the manufacturing margin wherein the defect-freeregion of the present invention, especially the region in which anoxide-precipitates layer is formed is enlarged, and thereby a stablesupply can be achieved.

As explained above, according to the present invention, there can bestably provided a silicon single crystal wafer with excellent electricalproperty and high breakdown voltage, in which there do not exist any ofdefect regions such as V region, OSF region and I region, and the oxidefilm defects detected by Cu deposition treatment are not formed.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an explanatory view showing the relation between a growth rateand a crystal defect distribution in the present invention.

FIG. 2 is a schematic view of the single crystal pulling apparatus usedin the present invention:

(a) apparatus A, (b) apparatus B.

FIG. 3(a) is a view showing the relation between a growth rate of asingle crystal and a cutting position of the crystal,

(b) is an explanatory view showing the OSF shrinkage velocity at eachpulling apparatus,

(c) is an explanatory view showing a method for producing a sample forevaluation of Cu deposition.

FIG. 4 is a WLT map in a direction of a crystal axis of a single crystalgrown with a single crystal pulling apparatus used in the presentinvention:

(a) apparatus A, (b) apparatus B.

FIG. 5 is a view showing a result of observation of a defectdistribution in Nv region by Cu deposition:

(a) oxide film defect region by Cu deposition,

(b) Nv region where the oxide film defects do not exist.

FIG. 6 is a view showing a result of measurement of the oxide dielectricbreakdown voltage level in Nv region:

(a) the oxide film defect generating region by Cu deposition,

(b) the Nv region where oxide-film defects did not generate.

FIG. 7 is an explanatory view showing the relation between a growth rateand a defect distribution of a crystal in the conventional method.

BEST MODE FOR CARRYING OUT THE INVENTION

The present invention will be explained below in detail, but the presentinvention is not limited thereto.

In advance of the explanation, terms will be explained.

1) FPD (Flow Pattern Defect) denotes flow patterns which, together withpits, are generated in the surface of a wafer which is sliced from agrown silicon single crystal ingot and treated by the steps of: removinga damaged layer from the surface portion of the wafer through etchingwith a mixed solution of hydrofluoric acid and nitric acid, and etchingthe wafer surface with a mixed solution of K₂Cr₂O₇, hydrofluoric acidand water (Secco etching). As FPD density in the plane of the waferbecomes higher, failure rate with regard to dielectric breakdownstrength of oxide film increase (Japanese patent Laid-Open (kokai) No4-192345).

2) SEPD (Secco Etch Pit Defect) denotes pits which are generated alonein the surface portion of a wafer which is Secco-etched in the samemanner as in the case of FPD. Pits accompanied by flow patterns aregenerically referred to as FPD. Pits not accompanied by flow patternsare generically referred to as SEPD. Large SEPD having a size of 10 μmor more (LSEPD) conceivably derives from a dislocation cluster. When thedislocation cluster is present in a device, current leaks through thedislocation, consequently, the function of a P-N junction is noteffective.

3) LSTD (Laser Scattering Tomography Defect) denotes a defect existingin wafer, and the scattering light due to the defect can be detected inthe following manner. That is, a wafer is sliced from a grown siliconsingle-crystal ingot, and is then treated by the steps of: removing adamaged layer from the surface portion of the wafer through etching witha mixed solution of hydrofluoric acid and nitric acid, and cleaving thewafer. When infrared light is introduced into the wafer through thecleavage plane, and light exiting from the wafer surface is detected,thereby a scattering light due to the defects existing in the wafer canbe detected. A scattering defect detected in this observation hasalready been reported at a meeting of an academic society or the likeand is considered to be an oxide precipitate (Jpn. J. Appl. Phys.vol.32, p.3679 1993). According to recent research, LSTD is reported tobe an octahedral void.

4) COP(Crystal Originated Particle) denotes a defect which causesdegradation of the dielectric breakdown strength of oxide film at acentral portion of a wafer and which is revealed as FPD in the case oftreatment through Secco etching, but is revealed as COP in the case ofcleaning in SC-1 cleaning (cleaning by using a mixed aqueous solution ofNH₄OH:H₂O₂:H₂O=1:1:10) which serves as a preferential etchant. The pithas a diameter not greater than 1 μm, which can be examined by a lightscattering method.

5) L/D (Large Dislocation; simplified expression of interstitialdislocation loop) denotes defects, such as LSEPD and LFPD, which areconsidered to be generated due to a dislocation loop. As describedabove, LSEPD refers to large SEPD having a size not less than 10 μm,while LFPD refers to FPD whose tip end pit has a size not less than 10μm. These are also considered to be generated due to dislocation loops.

6) Cu deposition method is a method for evaluating of a wafer by whichposition of defects in a semiconductor wafer can be accurately measured,detection limit for defects in a semiconductor wafer can be improved,and finer defects can be accurately measured and analyzed.

The specific evaluation method of a wafer comprises forming an insulatorfilm with a predetermined thickness on the surface of the wafer,destroying the insulator film on the defect part generated near thesurface of the wafer, and depositing electrolyte, such as Cu, at thedefect part (deposition). That is, the Cu deposition method is anevaluation method using the fact that when electric potential is appliedto an oxide film formed on the surface of the wafer in the liquid whereCu ions are dissolved, electric current flows to the part where theoxide film is degraded, and Cu ions are precipitated as Cu. It is knownthat defects such as COPs exist in the part where an oxide film is aptto be degraded.

The defect part of the wafer where Cu is deposited can be analyzed byobservation with the naked eye under a collimated light or directly, toevaluate a distribution and a density thereof. Furthermore, it can alsobe confirmed by microscope observation, a transmission electronmicroscope (TEM), a scanning electron microscope (SEM) or the like.

The inventors of the present invention have studied in detail defectsgenerated near a boundary between V region and I region of a siliconsingle crystal grown according to CZ method, and found that there existsa neutral N region in which the number of FPDs, LSTDs and COPs isconsiderably low, and no L/D exists between V region and I region and onthe outside of OSF ring.

Furthermore, it has been found that the N region can be classified intoNv region (the region containing a lot of vacancies) adjacent to theoutside of an OSF ring and Ni region (the region containing a lot ofinterstitial silicon) adjacent to I region, and a lot of oxideprecipitates are generated in the Nv region when thermal oxidationtreatment is carried out, and oxygen precipitation is not caused in Niregion.

However, even if the crystal is grown in the above-mentioned N region,some of them is inferior in oxide dielectric breakdown voltage, and thecause thereof has not been known. Then, the inventors of the presentinvention have studied the N region further in detail by the Cudeposition method, and found that a region where defects detected by Cudeposition treatment generate remarkably exists in N region of theoutside of an OSF region, which is a part of the Nv region where oxygenprecipitation is apt to be caused after a heat treatment for theprecipitation. Furthermore, they have found that this is a cause ofdegradation of electrical characteristics such as oxide dielectricbreakdown voltage characteristics or the like.

Accordingly, if the region which is an N region of the outside of theOSF and has no defect region detected by Cu deposition can be extendedall over a wafer, the wafer which does not have the above-mentionedvarious grown-in defects, and has surely improved oxide dielectricbreakdown voltage characteristics or the like can be obtained.

The inventors conducted the following experiments to know the relationbetween a growth rate and a defect distribution, grew a single crystalingot based on the result thereof, and evaluated the oxide dielectricbreakdown voltage characteristics of the wafer.

(Experiment 1)

The MCZ single crystal pulling apparatuses (a horizontal magnetic fieldis applied) shown as Apparatus A of FIG. 2(a) and Apparatus B of FIG.2(b) were used. In Apparatus A 150 kg of polycrystal silicon as rawmaterial was charged into a 24 inch quartz crucible. In Apparatus B, 160kg of polycrystal silicon as raw material was charged into a 26 inchquartz crucible. Then, a silicon single crystal with a diameter of 8inches (diameter of 200 mm) and orientation <100> was pulled using eachof the apparatuses. When pulling the single crystal, a growth rate wasgradually lowered from a top to a tail of the crystal in the range of0.7 mm/min to 0.3 mm/min. The crystal was produced so that the oxygenconcentration in the wafer might be 22-23 ppma (ASTM'79 value).

As shown in FIGS. 3(a) and (b), the pulled crystal was cut parallel tothe direction of the crystal growth axis from the head to the tail, toproduce four wafer samples. Among four samples, three samples weretested as for distribution of each region of V region, an OSF region andI region, distribution of FPD and LEP, and OSF generation by OSF heattreatment, by WLT (wafer life time) measurement (measuring instrument:SEMILAB WT-85) and Secco etching, to check a growth rate at boundary ofeach region. One of the samples produced by cutting parallel to thedirection of the crystal growth axis was cut in a shape of a wafer witha diameter of 6 inches as shown in FIG. 3(c), and a thermal oxide filmwas formed on the front surface of one of them after mirror finishing.Then, it was subjected to Cu deposition treatment, and a distribution ofoxide-film defects was determined.

Detail of the evaluation procedure of the wafer and an evaluation resultin this experiment will be given below.

(1) The pulled single crystal ingot was cut to blocks with length of 10cm, each of which was then cut parallel to the direction of a crystalgrowth axis to provide four samples with a thickness of about 2 mm.

(2) One of the above samples was subjected to heat treatment at 620° C.for 2 hours under nitrogen atmosphere in a wafer heat treating furnace,to heat treatment at 800° C. for 4-hour (nitrogen atmosphere), and thento heat treatment at 1000° C. for 16 hour (under dry oxygen atmosphere).Then, it was cooled, and a map of wafer life time (WLT) was createdusing SEMILAB-85 (See FIGS. 4(a) and (b)). Moreover, the 2nd sample wassubjected to mirror etching and then to Secco etching, and adistribution of FPD and LEP was observed. The 3rd sample was subjectedto OSF heat treatment followed by Secco etching, to remove the oxidefilm, and a distribution of OSF was confirmed. From these result, eachregion of V region, an OSF region and I region was identified, and agrowth rate at each boundary was investigated.

The growth rate (See FIG. 4(a)) at each boundary of the single crystalpulled with Apparatus A (FIG. 2(a)) was as follows.

V region/OSF region boundary: 0.484 mm/min, OSF disappearing boundary:0.472 mm/min, Cu deposition defect disappearing boundary: 0.467 mm/min,no precipitation N(Ni) region/I region boundary: 0.454 mm/min.

The growth rate (see FIG. 4(b)) at each boundary of the single crystalpulled with Apparatus B (FIG. 2(b)) was as follows.

V region/OSF region boundary: 0.596 mm/min, OSF disappearing boundary:0.587 mm/min, Cu deposition defect disappearing boundary: 0.566 mm/min,precipitation N(Nv) region/Ni region boundary: 0.526 mm/min, Ni region/Iregion boundary: 0.510 mm/min.(3) A sample in a shape of a wafer with a diameter of 6 inches was cutout from one of the remaining samples produced in (1) by cutting theabove-mentioned single crystal ingot parallel to the direction of acrystal growth axis (See FIG. 3(c)), and then subjected to mirrorfinishing. Then, a thermal oxide film was formed on the surface of thewafer, then subjected to Cu deposition treatment, and a distribution ofoxide film defects was confirmed.

The evaluation conditions are as follows.

-   1) Oxide film: 25 nm,-   2) electric field strength: 6 MV/cm,-   3) time of applying voltage: for 5 minutes.

The results of evaluation of Nv region by Cu deposition were shown inFIG. 5.

FIG. 5(a) shows a defect distribution of the oxide film defect regiongenerated by Cu deposition, and FIG. 5(b) shows a defect distribution ofthe Nv region having no oxide film defects by Cu deposition.

FIG. 6(a) shows a result of evaluation of oxide dielectric breakdownvoltage of the Nv region where oxide-film defects were generated by Cudeposition, and (b) shows a result of evaluation of oxide dielectricbreakdown voltage of the Nv region where oxide-film defects were notgenerated by Cu deposition.

From these results, it has been found that the defect region detected byCu deposition where an oxide-film defect is apt to generate exists inthe Nv region where oxygen precipitation is apt to be caused in the Nregion existing outside of OSF. Although it is the Nv region, an oxidedielectric breakdown voltage is not always good. On the other hand, ithas been found that a satisfactory oxide dielectric breakdown voltagecan be obtained in the Nv region where there is no defect regiondetected by Cu deposition, although it is also in the Nv region.

(Experiment 2)

Based on the above-mentioned results, using Apparatus B (FIG. 2(b)), acrystal was pulled with controlling a growth rate so that there might beobtained the region which is in N region outside of OSF, is not Cudeposition defect region (Dn region), and does not contain the Ni regionwhere oxygen precipitation is hardly caused. The pulled crystal wasprocessed to be a mirror finished wafer, and oxide dielectric breakdownvoltage characteristics were evaluated.

The C-mode measurement conditions are as follows.

-   1) Oxide film : 25 nm,-   2) measuring electrode: phosphorus doped polysilicon,-   3) electrode area: 8 mm2 and-   4) current density in decision: 1 mA/cm².

As a result, oxide dielectric breakdown voltage level as 100% of goodchip yield can be achieved.

The inventors of the present invention have studied further based on theknowledge acquired in the above experiments, and completed the presentinvention.

The first method for producing a silicon single crystal of the presentinvention is characterized in that a crystal is grown in a defect-freeregion which belongs to N region of the outside of OSF generated in ashape of a ring when thermal oxidation treatment is carried out in whichno defect region detected by Cu deposition exists.

The method will be explained below based on FIG. 1. The crystal is grownwith controlling the growth rate between the growth rate of the boundarywhere the defect region detected by Cu deposition remaining afterdisappearance of OSF ring is disappeared when gradually decreasing agrowth rate of silicon single crystal during pulling and the growth rateof the boundary where interstitial dislocation loop is generated when agrowth rate is gradually lowered further.

The wafer cut out from the single crystal ingot pulled by the methoddescribed above can be a defect-free silicon single crystal waferwherein whole plane of the wafer is occupied by the N region of theoutside of OSF generated in a shape of a ring when thermal oxidation isconducted, and the defect region which is detected by Cu deposition doesnot exist at all.

The second method for producing is characterized in that a crystal isgrown in the region which is N region on the outside of OSF generated ina shape of a ring by thermal oxidation treatment and in the range inwhich there exists neither defect region detected by Cu deposition norNi region where oxygen precipitation is hardly caused.

The method will be explained below based on FIG. 1. The crystal is grownwith controlling the growth rate between the growth rate of the boundarywhere the defect region detected by Cu deposition remaining afterdisappearance of OSF ring is disappeared when gradually decreasing agrowth rate of silicon-single crystal during pulling and the growth rateof the boundary where the Ni region in which oxygen precipitation ishardly caused is generated when a growth rate is gradually loweredfurther.

The wafer produced from the single crystal ingot pulled by the methoddescribed above can be a defect-free silicon single crystal waferwherein whole plane of the wafer is occupied by the N region of theoutside of OSF generated in a shape of a ring when thermal oxidation isconducted, and there exists in the whole plane of the wafer neither thedefect region detected by Cu deposition nor Ni region where oxygenprecipitation is hardly caused.

Since the wafer does not contain the Ni region where oxygenprecipitation is hardly caused, and consists only of Nv region, an oxideprecipitate layer is formed in a bulk when defect-free region issubjected to heat treatment in an atmosphere of nitrogen and dry oxygen.Accordingly, a silicon single crystal wafer produced from the region isexcellent not only in oxide dielectric breakdown voltage or the like,but also in a gettering performance.

When the product of the present invention is produced, the defect-freeregion of the present invention, especially the region where the oxideprecipitate layer is formed (Nv-Dn) is enlarged more by using a CZpulling machine having a rapid cooling function which enables pulling ofa silicon single crystal at a growth rate of 0.5 mm/min or higher, andthereby stability in manufacture can be achieved.

When using a CZ pulling apparatus wherein temperature gradient in axialdirection Gc of the crystal solid-liquid interface at the center part inthe crystal is small, and a growth rate higher than 0.5 mm/min cannot beachieved in production of the defect-free region of the presentinvention, mass production was not easy since a margin of growth rate ofa silicon single crystal as raw material of the present invention islower than 0.02 mm/min. However, when using a CZ pulling apparatuswherein Gc is large and a growth rate of 0.5 mm/min or more can beachieved when the defect-free region of the present invention isproduced, the margin of the growth rate of a silicon single crystal ofthe present invention as a raw material was 0.02 mm/min or more, and wasabout 0.05 mm/min at the highest. Especially, in the case of producingthe product of the present invention at a growth rate of 0.5 mm/min orhigher, a margin of growth rate in the region wherein a oxideprecipitate layer is formed in the bulk after heat treatment in anatmosphere of nitrogen and dry oxygen can be enlarged easily.

Finally, an example of the CZ method single crystal pulling apparatusused for the present invention will be explained below referring toFIGS. 2(a) (b) . As shown in FIG. 2(a), an apparatus 30 for pulling asingle crystal includes a pulling chamber 31, a crucible 32 provided inthe pulling chamber 31, a heater 34 disposed around the crucible 32, acrucible-holding axis 33 for rotating the crucible 32 and a rotationmechanism (not shown) therefor, a seed chuck 6 for holding a siliconseed crystal, a wire 7 for pulling the seed chuck 6, and a windingmechanism (not shown) for rotating and winding up the wire 7. Thecrucible 32 includes an inner quartz crucible for containing a siliconmelt 2 and an outer graphite crucible located outside the quartzcrucible. A heat insulating material 35 is disposed around the heater34.

In order to establish operating conditions for the production method ofthe present invention, an annular graphite cylinder (heat insulatingplate) 9 is provided. In the apparatus shown in FIG. 2(b), an annularouter heat insulating material 10 is provided around the solid-liquidinterface 4 of the single crystal. The heat insulating material 10 isdisposed such that a gap of 2-20 cm is formed between the lower endthereof and the surface 3 of the silicon melt 2. Furthermore, there maybe provided a tubular cooling device for cooling the single crystal byjetting a cooling gas or by shutting off radiant heat.

Recently, there may be used in many cases, a method wherein magnets (notshown) are provided outside horizontally of the pulling chamber 31, anda magnetic field such as a horizontal magnetic field, vertical magneticfield or the like is applied to the silicon melt 2, to achieve controlof melt convection and stable growth of single crystal, which is calledMCZ method.

A method for growing single crystal using the above-mentioned singlecrystal pulling apparatus 30 will be explained below.

First, a highly pure polycrystalline material of silicon is heated toits melting point (approximately 1420° C.) or higher and is thus meltedin the crucible 32. Then, the wire 7 is released until a tip end of theseed crystal comes into contact with the surface of the melt 2 at anapproximately central portion or is immersed therein. Subsequently, thecrucible holding shaft 33 is rotated in an appropriate direction, andthe wire 7 is wound up with being rotated at the same time to pull theseed crystal, and thereby growth of the single crystal is initiated.Then, through adequate regulation of the pulling rate and temperature,an approximately cylindrical single crystal ingot 1 can be obtained.

In that case, it is especially important for the achievement of theobjects of the present invention that, as shown in FIG. 2(a) or FIG.2(b), the annular graphite cylinder 9 (heat insulating plate) or theouter heat insulating material 10 surrounding the liquid portion of thesingle crystal ingot 1 above the surface of the melt in the pullingchamber 31 is disposed, so that the temperature zone of a melting pointof crystal to 1400° C. near the surface of the melt can be controlled.

Namely, the temperature in the furnace can be controlled by providingthe outer insulating material 10 in the pulling chamber 31 such that agap of 2-20 cm is formed between the lower end thereof and the surfaceof the silicon melt. Thereby, the temperature in the furnace can becontrolled so that the difference between the temperature gradient Gc [°C./cm] at the center of a crystal and the temperature gradient Ge [°C./cm] at the circumferential portion of the crystal may be smaller,namely the temperature gradient at the circumferential portion of thecrystal may be lower than the temperature gradient at the center of acrystal.

This outer heat insulating material 10 is on the outside of the graphitecylinder 12, and the heat insulating cylinder 11 is also provided insidethe graphite cylinder 12. Moreover, the top of the graphite cylinder 12is connected with a metal cylinder 13, and a cooling cylinder 14 isprovided thereon, in which cooling medium is allowed to flow for forcedcooling.

The silicon single crystal wafer produced by slicing the silicon singlecrystal manufactured by the method for producing the silicon singlecrystal described above is a defect-free wafer which belongs to N regionon the outside of OSF generated in a shape of a ring by thermaloxidation treatment in which no defect region detected by Cu depositionexists. Alternatively, it is a defect-free wafer which belongs to Nregion on the outside of OSF generated in a shape of a ring by thermaloxidation treatment in which neither a defect region detected by Cudeposition nor Ni region where oxygen precipitation is hardly causedexists in the whole plane of the wafer.

The present invention is not limited to the above-described embodiment.The above-described embodiment is a mere example, and those having thesubstantially same structure as that described in the appended claimsand providing the similar action and effects are included in the scopeof the present invention.

For example, in the above-described embodiment, the silicon singlecrystal having a diameter of 8 inches was grown. However, the presentinvention can be applied to a method of pulling a crystal recentlyproduced having larger diameter, for example, 10 to 16 inches, or more.Furthermore, the present invention can also be applied to a method inwhich a horizontal magnetic field, a vertical magnetic field or a cuspmagnetic field is applied to silicon melts, so-called MCZ method.

1. A silicon single crystal wafer grown according to Czochralski methodwherein the whole plane of the wafer is occupied by N region on theoutside of OSF generated in a shape of a ring by thermal oxidationtreatment and there exists no defect region detected by Cu deposition.2. A silicon single crystal wafer grown according to Czochralski methodwherein the whole plane of the wafer is occupied by N region on theoutside of OSF generated in a shape of a ring by thermal oxidationtreatment and there exists in the whole plane of the wafer neither adefect region detected by Cu deposition nor Ni region where oxygenprecipitation is hardly caused.
 3. A method for producing a siliconsingle crystal according to Czochralski method wherein the crystal isgrown in a defect-free region which is N region on the outside of OSFgenerated in a shape of a ring when the grown silicon single crystalwafer is subjected to thermal oxidation treatment in which a defectregion detected by Cu deposition does not exist.
 4. A method forproducing a silicon single crystal according to the Czochralski methodwherein the crystal is grown with controlling a growth rate between thegrowth rate of the boundary where the defect region detected by Cudeposition remaining after disappearance of OSF ring is disappeared whengradually decreasing a growth rate of silicon single crystal duringpulling and the growth rate of the boundary where interstitialdislocation loop is generated when a growth rate is gradually loweredfurther.
 5. A method for producing a silicon single crystal according toCzochralski method wherein the crystal is grown in a defect-free regionwhich is N region on the outside of OSF generated in a shape of a ringwhen the grown silicon single crystal wafer is subjected to thermaloxidation treatment in which neither a defect region detected by Cudeposition nor Ni region where oxygen precipitation is hardly causedexists.
 6. A method for producing a silicon single crystal according tothe Czochralski method wherein the crystal is grown with controlling agrowth rate between the growth rate of the boundary where the defectregion detected by Cu deposition remaining after disappearance of OSFring is disappeared when gradually decreasing a growth rate of siliconsingle crystal during pulling and the growth rate of the boundary wherethe Ni region in which oxygen precipitation is hardly caused isgenerated when a growth rate is gradually lowered further.
 7. The methodfor producing a silicon single crystal according to claim 3 wherein apulling rate at the time of a crystal growth is 0.5 mm/min or more. 8.The method for producing a silicon single crystal according to claim 4wherein a pulling rate at the time of a crystal growth is 0.5 mm/min ormore.
 9. The method for producing a silicon single crystal according toclaim 5 wherein a pulling rate at the time of a crystal growth is 0.5mm/min or more.
 10. The method for producing a silicon single crystalaccording to claim 6 wherein a pulling rate at the time of a crystalgrowth is 0.5 mm/min or more.